An efficient hardware design for HDTV H.264/AVC encoder.
Liang WeiDandan DingJuan DuBin-bin YuLu YuPublished in: J. Zhejiang Univ. Sci. C (2011)
Keyphrases
- hardware design
- bit rate
- rate distortion
- rate control
- video codec
- picture quality
- low complexity
- hardware implementation
- video encoder
- video coding
- decoding process
- macroblock
- video compression
- fpga hardware
- high definition
- bitstream
- video conferencing
- coding efficiency
- mode selection
- video coding standard
- intra coding
- visual quality
- mode decision
- intra prediction
- computational complexity
- high coding efficiency
- motion estimation
- scalable video coding
- field programmable gate array
- inter frame
- image processing algorithms
- intra frame
- video quality
- base layer
- fine grained
- low cost
- motion compensation