An Iterative Delay Chain based Impedance to Digital Converter using 0.18μm CMOS.

Biswajit Mishra Lokesh Jigalur

Published in: ISED (2018)

Keyphrases

analog to digital converter
low voltage
data conversion
circuit design
cmos image sensor
low cost
high speed
power consumption
image sensor
phase locked loop
analog vlsi
control method
power dissipation
mixed signal
control algorithm
low power
control system
neural network