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Test-Time Reduction for Power-Aware 3D-SoC.

Sabyasachee BanerjeeSubhashis MajumderBhargab B. Bhattacharya
Published in: VLSI Design (2018)
Keyphrases
  • power consumption
  • low power
  • power reduction
  • neural network
  • data mining
  • genetic algorithm
  • website
  • case study
  • computational complexity
  • hardware and software
  • hardware software co design