Optimal motion estimation using reduced bits and its low power VLSI implementation.
Shahrukh AghaFarman Ullah JanDilshad SabirKhurram SaleemUsman Ali GulzariAtif ShakeelPublished in: ICSIPA (2017)
Keyphrases
- low power
- vlsi architecture
- vlsi implementation
- motion estimation
- power consumption
- low cost
- high speed
- low complexity
- image sequences
- logic circuits
- video sequences
- optical flow
- fir filters
- cmos technology
- filter bank
- motion compensation
- low power consumption
- mixed signal
- real time
- inter frame
- spatial domain
- motion vectors
- computer vision