Memory-aware TLP throttling and cache bypassing for GPUs.
Jun ZhangYanxiang HeFanfan ShenQing'an LiHai TanPublished in: Clust. Comput. (2019)
Keyphrases
- memory bandwidth
- main memory
- memory hierarchy
- memory access
- cache conscious
- computational power
- memory subsystem
- cache misses
- virtual memory
- memory management
- computing power
- memory usage
- processing power
- multithreading
- resource consumption
- garbage collection
- caching scheme
- level parallelism
- prefetching
- memory requirements
- data access
- general purpose
- query processing
- compute intensive
- parallel programming
- buffer management
- graphics processing units
- floating point
- data management
- read write
- real time
- binary trees
- memory space
- random access
- associative memory
- database management systems
- single instruction multiple data