Reconfigurable Block Floating Point Processing Elements in Virtex Platforms.
Guillermo CondeGregory W. DonohoePublished in: ReConFig (2011)
Keyphrases
- floating point
- processing elements
- hardware implementation
- reconfigurable hardware
- field programmable gate array
- functional units
- hardware architecture
- image processing algorithms
- fixed point
- signal processing
- massively parallel
- efficient implementation
- parallel architecture
- parallel processors
- associative memory
- random access
- low cost
- parallel computers
- hardware design
- instruction set
- parallel architectures
- floating point arithmetic
- embedded systems
- hardware software
- parallel implementation
- fine grained
- image processing