Approximate Scan Flip-flop to Reduce Functional Path Delay and Power Consumption.

Lakshmi Bhanuprakash Reddy Konduru Vijaya Lakshmi Jaynarayan T. Tudu

Published in: CoRR (2022)

Keyphrases

power consumption
power dissipation
low power
flip flops
save energy
energy efficiency
battery life
power management
power saving
power reduction
energy saving
battery powered
cmos technology
nm technology
data center
real time
digital signal processing
shortest path
low cost
end to end delay
high speed
response time