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A fast-locking low-jitter pulsewidth control loop for high-speed pipelined ADC.
Jingyu Wang
Zhangming Zhu
Guangwen Yu
Huaxi Gu
Lianxi Liu
Yintang Yang
Published in:
IEICE Electron. Express (2012)
Keyphrases
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control loop
high speed
control scheme
control system
closed loop
control strategy
low power
packet loss
real time
database systems
databases
steady state
mathematical model
concurrency control
dynamic model
data flow
highly correlated
high levels