A Hardware Accelerator for Protocol Buffers.
Sagar KarandikarChris LearyChris KennellyJerry ZhaoDinesh ParimiBorivoje NikolicKrste AsanovicParthasarathy RanganathanPublished in: MICRO (2021)
Keyphrases
- field programmable gate array
- lightweight
- hardware and software
- low cost
- real time
- production system
- computing power
- formal analysis
- network protocols
- embedded systems
- parallel implementation
- communication protocol
- coloured petri nets
- tcp ip
- key distribution
- security protocols
- massively parallel
- hardware implementation
- computer systems
- image processing
- application layer
- hardware architecture
- cryptographic protocols
- distributed systems
- reduce the energy consumption