A low-voltage, low-power CMOS delay element.
Gyudong KimMin-Kyu KimByoung-Soo ChangWonchan KimPublished in: IEEE J. Solid State Circuits (1996)
Keyphrases
- low voltage
- low power
- cmos technology
- power dissipation
- power consumption
- low cost
- high speed
- power management
- single chip
- mixed signal
- logic circuits
- digital signal processing
- design considerations
- nm technology
- vlsi circuits
- low power consumption
- image sensor
- image processing
- gate array
- cmos image sensor
- data center
- pattern recognition