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Integrated Hardware Architecture for Efficient Computation of the $n$-Best Bio-Sequence Local Alignments in Embedded Platforms.
Nuno Sebastião
Nuno Roma
Paulo F. Flores
Published in:
IEEE Trans. Very Large Scale Integr. Syst. (2012)
Keyphrases
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efficient computation
hardware architecture
hardware implementation
sequence alignment
computational efficiency
field programmable gate array
embedded systems
hardware architectures
efficient implementation
window search
pairwise
fine grained
associative memory
skyline queries
databases
feature selection