A 16-kb 9T Ultralow-Voltage SRAM With Column-Based Split Cell-VSS, Data-Aware Write-Assist, and Enhanced Read Sensing Margin in 28-nm FDSOI.
M. Sultan M. SiddiquiZhao Chuan LeeTony Tae-Hyoung KimPublished in: IEEE Trans. Very Large Scale Integr. Syst. (2021)