A Hardware-Efficient Multi-Resolution Block Matching Algorithm and its VLSI Architecture for High Definition MPEG-Like Video Encoders.
Hai Bing YinHuizhu JiaHonggang QiXianghu JiXiaodong XieWen GaoPublished in: IEEE Trans. Circuits Syst. Video Technol. (2010)
Keyphrases
- high definition
- vlsi architecture
- real time
- video coding
- multiresolution
- vlsi implementation
- video compression
- block matching algorithm
- video sequences
- low complexity
- motion compensation
- motion estimation
- motion compensated
- compressed video
- video encoder
- multimedia
- mode decision
- motion vectors
- low power
- digital video
- video coding standard
- stereo vision
- computationally efficient
- high resolution
- video content
- block matching
- video data
- low cost
- quadtree
- video streams
- subband
- three dimensional