Login / Signup

H.264 video decoder implemented on FPGAs using 3×3 and 2×2 networks-on-chip.

Ian J. BargeCristinel Ababei
Published in: ReConFig (2017)
Keyphrases
  • low cost
  • high speed
  • real time
  • video decoder
  • image compression
  • general purpose
  • reconfigurable hardware