A Comparator With Reduced Delay Time in 65-nm CMOS for Supply Voltages Down to 0.65 V.
Bernhard GollHorst ZimmermannPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2009)
Keyphrases
- cmos technology
- high speed
- low cost
- silicon on insulator
- analog vlsi
- power consumption
- low power
- nm technology
- transmission line
- operating conditions
- genetic algorithm
- database
- circuit design
- power supply
- focal plane
- expert systems
- distribution networks
- image processing
- hd video
- metal oxide semiconductor
- artificial intelligence