A 4Gb/s CMOS fully-differential analog dual delay-locked loop clock/data recovery circuit.

Zhiwei Mao T. H. Szymansli

Published in: ICECS (2003)

Keyphrases

high speed
data sets
data analysis
data processing
database
knowledge discovery
image data
data sources
prior knowledge
training data
data collection
data acquisition
original data
end users
data structure
neural network
computer systems
statistical analysis
data quality
databases
synthetic data
missing data