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Low Power Co-design Tool and Power Optimization of Schedules and Memory System.
Patricia Guitton-Ouhamou
Hanene Ben Fradj
Cécile Belleudy
Spiridon Nikolaidis
Published in:
PATMOS (2004)
Keyphrases
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low power
power consumption
high power
power dissipation
high speed
wireless transmission
low cost
power reduction
power management
single chip
digital signal processing
ultra low power
cmos technology
logic circuits
power saving
low power consumption
energy saving
scheduling problem
image sensor
energy dissipation
vlsi circuits
nm technology
computational power
real time
vlsi architecture
random access
delay insensitive
gate array