A methodology for hardware architecture trade-off at different levels of abstraction.
Claus SchneiderPublished in: ED&TC (1997)
Keyphrases
- levels of abstraction
- hardware architecture
- trade off
- hardware implementation
- abstraction levels
- hardware architectures
- real time
- associative memory
- field programmable gate array
- block matching motion estimation
- image processing
- probabilistic model
- general purpose
- distributed systems
- signal processing
- xilinx virtex