Configuration compression for the Xilinx XC6200 FPGA.
Scott HauckZhiyuan LiEric J. SchwabePublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1999)
Keyphrases
- field programmable gate array
- hardware implementation
- xilinx virtex
- hardware architecture
- high speed
- fpga implementation
- pipelined architecture
- fpga device
- dedicated hardware
- data compression
- hardware description language
- image compression
- embedded systems
- image processing algorithms
- compression scheme
- programmable logic
- software implementation
- signal processing
- compression ratio
- computing systems
- parallel computing
- compression algorithm
- hardware design
- hardware architectures
- compression rate
- efficient implementation
- hyperspectral image compression
- fpga technology
- random access
- optimal configuration
- real time
- integrated circuit
- pattern recognition