An Improved DCM-Based Tunable True Random Number Generator for Xilinx FPGA.
Anju P. JohnsonRajat Subhra ChakrabortyDebdeep MukhopadhyayPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2017)
Keyphrases
- random number generator
- field programmable gate array
- hardware implementation
- high speed
- fpga implementation
- random number
- hardware architecture
- fpga device
- pipelined architecture
- hardware description language
- dedicated hardware
- embedded systems
- hardware design
- real time image processing
- signal processing
- parallel computing
- real time
- software implementation
- shift register
- fingerprint authentication
- image processing algorithms
- computing systems
- low power
- programmable logic
- efficient implementation
- data acquisition
- missing data
- low cost
- text mining
- bayesian networks