Parallel Graph Contraction with Applications to a Reconfigurable Parallel Architecture.
Yuh-Dauh LyuuEugen SchenfeldPublished in: ICPP (3) (1994)
Keyphrases
- parallel architecture
- systolic array
- hardware implementation
- parallel processing
- shared memory
- distributed memory
- parallel implementation
- processing elements
- high level synthesis
- efficient implementation
- data flow
- image processing algorithms
- synthetic aperture sonar
- field programmable gate array
- belief change
- parallel computing
- signal processing
- pattern recognition
- cooperative
- image sequences