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A 8-ns Settling Time Fully Integrated LDO with Dynamic Biasing and Bulk Modulation Techniques in 40nm CMOS.
T. Nagateja
Neha Kumari
Ke-Horng Chen
Ying-Hsi Lin
Shian-Ru Lin
Tsung-Yen Tsai
Published in:
ISCAS (2020)
Keyphrases
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