Symmetry and Reduced Symmetry in Model Checking.
A. Prasad SistlaPatrice GodefroidPublished in: CAV (2001)
Keyphrases
- model checking
- temporal logic
- formal verification
- finite state
- automated verification
- temporal properties
- model checker
- computation tree logic
- concurrent systems
- partial order reduction
- symbolic model checking
- formal specification
- epistemic logic
- deterministic finite automaton
- finite state machines
- verification method
- formal methods
- reachability analysis
- pspace complete
- transition systems
- timed automata
- process algebra
- asynchronous circuits
- description language
- reactive systems
- modal logic
- alternating time temporal logic
- artificial intelligence