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Using Genetic Algorithms to Optimize the Instruction-Set Encoding on Processor Cores.
Moritz Weißbrich
Javier Andrés Moreno-Medina
Guillermo Payá Vayá
Published in:
MOCAST (2021)
Keyphrases
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instruction set
level parallelism
floating point
computer architecture
application specific
embedded systems
general purpose
multi core processors
ibm power processor
instruction set architecture
floating point arithmetic
parallel processing