Measurement of Power Dissipation Due to Parasitic Capacitances of Power MOSFETs.
Utkarsh JadliFaisal Mohd-YasinHamid Amini MoghadamPeyush PandeJordan R. NichollsSima DimitrijevPublished in: IEEE Access (2020)
Keyphrases
- power dissipation
- power consumption
- low power
- power reduction
- cmos technology
- chip design
- power management
- low voltage
- energy efficiency
- digital signal processing
- power saving
- low cost
- logic circuits
- design methodology
- energy saving
- image analysis
- nm technology
- network on chip
- neural network
- data center
- pattern recognition
- high speed
- short circuit
- computer vision