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Measurement of Power Dissipation Due to Parasitic Capacitances of Power MOSFETs.
Utkarsh Jadli
Faisal Mohd-Yasin
Hamid Amini Moghadam
Peyush Pande
Jordan R. Nicholls
Sima Dimitrijev
Published in:
IEEE Access (2020)
Keyphrases
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power dissipation
power consumption
low power
power reduction
cmos technology
chip design
power management
low voltage
energy efficiency
digital signal processing
power saving
low cost
logic circuits
design methodology
energy saving
image analysis
nm technology
network on chip
neural network
data center
pattern recognition
high speed
short circuit
computer vision