A new read-write collision-based SRAM PUF implemented on Xilinx FPGAs.

Ihsan Çiçek Ahmad Alkhas

Published in: J. Cryptogr. Eng. (2023)

Keyphrases

read write
field programmable gate array
hardware implementation
pipelined architecture
high speed
power consumption
fpga device
fpga implementation
flash memory
external memory
video sequences
high dimensional
mobile devices
data management