) with FPGA.
Guerric Meurice de DormalePhilippe BulensJean-Jacques QuisquaterPublished in: CHES (2007)
Keyphrases
- field programmable gate array
- high speed
- hardware implementation
- real time image processing
- low cost
- real time
- verilog hdl
- hardware architectures
- hardware architecture
- systolic array
- fpga implementation
- software implementation
- pattern recognition
- digital signal
- computer vision
- gate array
- single chip
- bio inspired
- general purpose
- artificial neural networks
- low power consumption
- power reduction
- xilinx virtex
- decision making
- fpga hardware
- data mining