Enabling Modular Verification with Abstract Interference Specifications for a Concurrent Queue.
Alan WeidePaolo A. G. SivilottiMurali SitaramanPublished in: VSTTE (2016)
Keyphrases
- automated verification
- concurrent systems
- formal verification
- high level
- model checking
- state machines
- bounded model checking
- model checker
- asynchronous circuits
- protocol specification
- steady state
- formal specification
- transition systems
- face verification
- queue length
- arrival rate
- data sets
- mutual exclusion
- verification method
- priority scheduling
- queueing theory
- temporal logic
- delay insensitive
- special case
- multipath
- waiting times
- low level
- state dependent
- specification language
- functional requirements