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A 112 Gb/s -8.2 dBm Sensitivity 4-PAM Linear TIA in 16nm CMOS with Co-Packaged Photodiodes.
Dhruv Patel
Alireza Sharif Bakhtiar
Anthony Chan Carusone
Published in:
CICC (2022)
Keyphrases
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high speed
cmos technology
power consumption
closed form
information retrieval
low cost
sensitivity analysis
linear systems
power supply
high sensitivity
neural network
website
operating system
linear model
linear constraints
linear complexity