DSTN (Distributed Sleep Transistor Network) for Low Power Programmable Logic array Design
Pradeep SinglaKamya DhingraNaveen Kr. MalikPublished in: CoRR (2012)
Keyphrases
- low power
- high speed
- single chip
- power consumption
- low cost
- low power consumption
- vlsi architecture
- power dissipation
- logic circuits
- cmos technology
- digital signal processing
- peer to peer
- gate array
- computer networks
- ultra low power
- high power
- power reduction
- mixed signal
- distributed systems
- wireless sensor networks
- circuit design
- wireless transmission
- vlsi circuits
- design process
- image sensor
- embedded systems
- communication networks