Thread Relocation: A Runtime Architecture for Tolerating Hard Errors in Chip Multiprocessors.
Omer KhanSandip KunduPublished in: IEEE Trans. Computers (2010)
Keyphrases
- multithreading
- analog vlsi
- low cost
- management system
- high speed
- host computer
- vlsi implementation
- real time
- software architecture
- network on chip
- cmos image sensor
- parallel implementation
- single chip
- design considerations
- cmos technology
- parallel computing
- level parallelism
- computational power
- data flow
- hardware implementation