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7-bit 2.56 GS/s folding ADC with nanometric compatible architecture by using a high dynamic I/O folding amplifier.

Luis Antonio Carrillo-MartínezGuillermo Espinosa Flores-Verdad
Published in: LASCAS (2013)
Keyphrases
  • protein folding
  • high sensitivity
  • dynamic environments
  • input output
  • virtual organization
  • protein structure prediction
  • analog to digital converter
  • neural network
  • wide range
  • design considerations
  • energy landscape