Cascade and Extensible In-Memory Arithmetic Computing in 2T1R ReRAM Arrays Using Time-Sum-Logic Design.
Wei ZhuYi-Xing HeHao-Nan LiXian-Qin LiuSiwen ZhangLei WangJiang ZhuYue-Qi WangJincheng ZhangYue HaoHaijiao Harsan MaPublished in: IEEE Access (2024)