Finite Field Parallel Multiplier for FPGA.
Lory KimsoeunTakakazu KurokawaKeisuke IwaiPublished in: ECIW (2005)
Keyphrases
- hardware implementation
- parallel hardware
- high speed
- parallel processing
- systolic array
- information systems
- real time image processing
- finite number
- real time
- evolutionary algorithm
- parallel implementation
- pipelined architecture
- parallel architecture
- parallel computing
- denoising
- artificial intelligence
- neural network
- databases