Formal Specification and Verification of Communication-Systems for designing in VHDL.
Olaf DrögehornOliver TerhorstHeinz-Dieter HümmerWalter GeisselhardtPublished in: FBT (1999)
Keyphrases
- communication systems
- formal specification
- model checking
- concurrent systems
- formal methods
- model checker
- temporal logic
- object oriented design
- specification languages
- information processing systems
- protocol specification
- process algebra
- specification language
- formal verification
- blind equalization
- computer systems
- multiple access
- grid workflow
- communication technologies
- reverse engineering
- bounded model checking
- asynchronous circuits
- information systems
- data model
- hardware description language
- data mining