Ultra-High-Speed Accelerator Architecture for Convolutional Neural Network Based on Processing-in-Memory Using Resistive Random Access Memory.
Hongzhe WangJunjie WangHao HuGuo LiShaogang HuQi YuZhen LiuTupei ChenShijie ZhouYang LiuPublished in: Sensors (2023)
Keyphrases
- random access memory
- high speed
- design considerations
- embedded dram
- memory access
- real time
- memory management
- processing units
- processing elements
- low voltage
- gigabit ethernet
- low power
- compute intensive
- data processing
- high volume
- operating system
- frame rate
- data access
- instruction set
- main memory
- data flow
- management system