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A Spur-Frequency-Boosting PLL With a -74 dBc Reference-Spur Suppression in 90 nm Digital CMOS.
Mohamed M. Elsayed
Mohammed M. Abdul-Latif
Edgar Sánchez-Sinencio
Published in:
IEEE J. Solid State Circuits (2013)
Keyphrases
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metal oxide semiconductor
circuit design
low cost
power consumption
feature selection
cmos technology
support vector machine
ensemble learning
nm technology
real time
cmos image sensor
mixed signal
low voltage
power supply
digital media
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learning algorithm
machine learning