Implementation of JPEG2000 arithmetic decoder using dynamic reconfiguration of FPGA.
Sophie BouchouxEl-Bay BourennaneMichel PaindavoinePublished in: ICIP (2004)
Keyphrases
- fpga implementation
- dynamic reconfiguration
- hardware implementation
- field programmable gate array
- software systems
- image compression
- decoding process
- application specific
- fpga technology
- efficient implementation
- hardware architecture
- image coding
- dedicated hardware
- object oriented
- dynamic behavior
- open source
- response time