Login / Signup

A FPGA Based Design of a Multiplierless and Fully Pipelined JPEG Compressor.

Luciano Volcan AgostiniRoger Endrigo Carvalho PortoSergio BampiIvan Saraiva Silva
Published in: DSD (2005)
Keyphrases
  • case study
  • image processing
  • design process
  • design space
  • discrete cosine transform
  • image compression
  • post processing