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A fast, predictable FPGA with PLLs, dual port SRAMs and active repeaters.

Paul T. SasakiYogendra BobraWarren E. CoryAtul V. CihiaSuresh M MenonMadhavi KolaMammen ThomasPrasad RauArch Zaliznyak
Published in: CICC (1999)
Keyphrases
  • hardware implementation
  • high speed
  • real time image processing
  • real time
  • data mining
  • signal processing
  • field programmable gate array
  • hardware design
  • fpga implementation
  • verilog hdl