An Efficient I/O Architecture for RAM-based Content-Addressable Memory on FPGA.
Xuan-Thuan NguyenTrong-Thuc HoangHong-Thu NguyenKatsumi InoueCong-Kha PhamPublished in: CoRR (2018)
Keyphrases
- content addressable memory
- high speed
- hardware architecture
- hardware implementation
- design considerations
- hardware design
- real time
- main memory
- hardware architectures
- software implementation
- fpga implementation
- signal processing
- xilinx virtex
- fpga device
- file system
- data flow
- parallel architecture
- memory access
- image processing
- dedicated hardware
- processing elements
- database systems
- low cost
- field programmable gate array