Minimizing interconnect energy through integrated low-power placement and combinational logic synthesis.
Glenn HoltAkhilesh TyagiPublished in: ISPD (1997)
Keyphrases
- logic circuits
- low power
- logic synthesis
- high speed
- power dissipation
- power consumption
- energy dissipation
- low cost
- energy efficiency
- ultra low power
- single chip
- digital signal processing
- energy saving
- gate array
- vlsi architecture
- energy consumption
- low power consumption
- vlsi circuits
- real time
- image sensor
- cmos technology