A 11.1-bit ENOB 50-MS/s pipelined A/D converter in 130-nm CMOS without S/H front end.
Jürg TreichlerQiuting HuangPublished in: ESSCIRC (2010)
Keyphrases
- analog to digital converter
- low voltage
- random access memory
- cmos technology
- nm technology
- back end
- low power
- mixed signal
- silicon on insulator
- power consumption
- image sensor
- data flow
- low cost
- power dissipation
- data conversion
- vlsi circuits
- metal oxide semiconductor
- multiple sclerosis
- instruction set architecture
- single chip
- operating system