A RISC-V Neuromorphic Micro-Controller Unit (vMCU) with Event-Based Physical Interface and Computational Memory for Low-Latency Machine Perception and Intelligence at the Edge.
Daniel R. MendatJonah P. SenguptaGaspar TognettiMartin VillemurPhilippe O. PouliquenSergio MontanoKayode SanniJamal Lottier MolinNishant ZachariahIsidoros DoxasAndreas G. AndreouPublished in: ISCAS (2023)