A partially switched-opamp technique for high-speed low-power pipelined analog-to-digital converters.
Hwi-Cheol KimDeog-Kyoon JeongWonchan KimPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2006)
Keyphrases
- low power
- mixed signal
- high speed
- vlsi circuits
- power consumption
- low cost
- vlsi architecture
- single chip
- high power
- cmos technology
- wireless transmission
- logic circuits
- digital signal processing
- low power consumption
- data flow
- frame rate
- cmos image sensor
- analog to digital converter
- gate array
- image sensor
- multi channel
- general purpose
- real time