A 1.2-GS/s 8-bit Two-Step SAR ADC in 65-nm CMOS With Passive Residue Transfer.

Hai Huang Ling Du Yun Chiu

Published in: IEEE J. Solid State Circuits (2017)

Keyphrases

analog to digital converter
random access memory
low power
cmos technology
post processing
low cost
high speed
power consumption
synthetic aperture radar
electro optic
image reconstruction
transfer learning
parallel processing
image sensor