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A design kit for a fully working shared memory multiprocessor on FPGA.

Antonino TumeoMatteo MonchieroGianluca PalermoFabrizio FerrandiDonatella Sciuto
Published in: ACM Great Lakes Symposium on VLSI (2007)
Keyphrases
  • real time
  • hardware design
  • case study
  • dynamic programming
  • post processing
  • verilog hdl
  • response time
  • signal processing
  • efficient implementation
  • hardware architecture