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Low Latency YOLOv3-Tiny Accelerator for Low-Cost FPGA Using General Matrix Multiplication Principle.
Trio Adiono
Adiwena Putra
Nana Sutisna
Infall Syafalni
Rahmat Mulyawan
Published in:
IEEE Access (2021)
Keyphrases
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low cost
low latency
matrix multiplication
highly efficient
high speed
real time
parallel implementation
field programmable gate array
virtual machine