Scalable Hardware Priority Queue Architectures for High-Speed Packet Switches.
Sung-Whan MoonKang G. ShinJennifer RexfordPublished in: IEEE Real Time Technology and Applications Symposium (1997)
Keyphrases
- priority queue
- high speed
- content addressable memory
- low latency
- gigabit ethernet
- real time
- data acquisition
- data structure
- low power
- parallel architectures
- low cost
- computing systems
- real time embedded
- multi core processors
- computer systems
- frame rate
- embedded systems
- packet loss
- service times
- hardware implementation
- end users
- end to end
- protection schemes
- commodity hardware
- scalable video coding
- steady state