Low power NoC architecture based dynamic reconfigurable system.
K. NirmaladeviJ. SundararajanPublished in: Clust. Comput. (2019)
Keyphrases
- low power
- low cost
- vlsi architecture
- power consumption
- cmos technology
- high speed
- multi processor
- single chip
- power reduction
- vlsi circuits
- mixed signal
- real time
- high power
- logic circuits
- low power consumption
- digital signal processing
- network on chip
- image sensor
- wireless transmission
- nm technology
- gate array
- hardware implementation
- hardware and software
- signal processor
- vlsi implementation
- embedded systems
- delay insensitive
- routing algorithm